ds1100ped 1100 watts distributed power system front-end bulk power total output power: 1100 w continuous wide input voltage: 90 to 264 vac special features ? 1100 w output power ? high-power and short form factor ? 1u power supply ? high-density design: 24 w/in 3 ? active power factor correction ? en61000-3-2 harmonic compliance ? inrush current control ? 80plus platinum effciency ? n+1 or n+n redundant ? hot-pluggable ? active current sharing ? full digital control ? pmbus compliant ? accurate input power reporting ? compatible with artesyns universal pmbus gui ? reverse airfow option ? two-year warranty compliance ? emi conducted/radiated class a limits + 6 db margin ? en61000-4-11 safety ? ul/cul 60950 (ul recognized) ? demko+ cb report en60950 ? en60950 ? ce mark ? china ccc ? bsmi electrical specifcations input input range 90 - 264 vac frequency 47 hz to 63 hz effciency 94.0% peak max input current 14 arms inrush current 55 apk conducted emi class a radiated emi class a power factor > 0.9 beginning at 20% load ithd 10% leakage current 1.4 ma hold-up time 10 ms at full load output main dc output standby dc output min nom max min nom max nominal setting -0.20% 12 0.20% -1% 12 1% total output regulation range 11.4 v 12.6 v 11.4 v 12.6 v dynamic load regulation range 11.4 v 12.6 v 11.4 v 12.6 v output ripple 120 mvp-p 120 mvp-p adjustment range tbd 0.1 a 3.0 a output current 2 a 1 91.76 a current sharing within 5% of full load rating n/a capacitive loading 2000 uf 40,000 uf 47 uf 680 uf start-up from ac to output 2200 ms 1700 ms output rise time 5 ms 50 ms 2 ms 60 ms 1 minimum current for transient load response testing only. unit is designed to operate and be within output regulation range at zero load. data sheet power
electrical specifcations protections main output min nom max overcurrent protection 2 120% 150% overvoltage protection 1 13.5 v 15.0 v undervoltage protection 10.5 v 11.0 v overtemperature protection yes fan fault protection yes standby output overcurrent protection 3 120% 150% overvoltage protection 3 13.5 v 15.0 v undervoltage protection 10.0 v 11.0 v 1 latch mode 2 autorecovery if the overcurrent is less than 120% and last only for <500 ms 3 standby protection is auto-recovery power derating 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 1 0 0 0 1 1 0 0 1 2 0 0 1 0 2 0 3 0 4 0 5 0 6 0 o u t p u t p ow e r a t 9 0 v a c a m b i e n t t e m p e r a t u r e ( d e g c ) ds 1 1 0 0 p e d - 3 ds 1 1 0 0 p e d - 3 - 0 0 1 ordering information model number nominal main output standby output airflow direction DS1100PED-3 12 v 12 v @ 3 a std (forward) DS1100PED-3-001 12 v 12 v @ 3 a reverse 1 1 derating may apply ds1100ped data sheet
control and status signals input signals pson_l active low signal which enables/disables the main output. pulling this signal low will turn-on the main output. recommended pull-up resistor to 12 vsb is 8.2 k with a 3.0 k pull-down to ground. a 100 pf decoupling capacitor is also recommended. min max v il input logic level low 0.8 v v ih input logic level high 2.0 v 5.0 v i source current that may be sourced by this pin 2 ma i sink current that may be sunk by this pin at low state 0.5 ma pskill_l first break/last mate active low signal which enables/disables the main output. this signal will have to be pulled to ground at the system side with a 220 ohm resistor. a 100 pf decoupling capacitor is also recommended. min max v il input logic level low 0.8 v v ih input logic level high 2.0 v 5.0 v i source current that may be sourced by this pin 2 ma i sink current that may be sunk by this pin at low state 0.5 ma output signals acok signal used to indicate the presence of ac input to the power supply. a logic level high will indicate that the ac input to the power supply is within the operating range while a logic level low will indicate that ac has been lost. this is an open collector/drain output. this pin is pulled high by a 1.0 kohm resistor connected to 3.3 v inside the power supply. it is recommended that this pin be connected to a 100 pf decoupling capacitor and pulled down by a 100 kohm resistor. min max v il input logic level low 0.6 v v ih input logic level high 2.0 v 5.0 v i source current that may be sourced by this pin 3.3 ma i sink current that may be sunk by this pin at low state 0.7 ma pwr_good / pwok signal used to indicate that main output voltage is within regulation range. the pwr_good signal will be driven high when the output voltage is valid and will be driven low when the output falls below the under-voltage threshold. this signal also gives an advance warning when there is an impending power loss due to loss of ac input or system shutdown request. more details in the timing section. this is an open collector/drain output. this pin is pulled high by a 1.0 kohm resistor connected to 3.3 v inside the power supply. it is recommended that this pin be connected to a 100 pf decoupling capacitor and pulled down by a 10 kohm resistor. min max v il input logic level low 0.8 v v ih input logic level high 2.0 v 5.0 v i source current that may be sourced by this pin 3.3 ma i sink current that may be sunk by this pin at low state 0.7 ma ds1100ped data sheet
control and status signals output signals ps_present_l signal used to indicate to the system that a power supply is inserted in the power bay. this pin is shorted to the standby return in the power supply. recommended pull-up resistor to 12 vsb is 8.2 k with a 3.0 k pull-down to ground. a 100 pf decoupling capacitor is also recommended. ps_interrupt_l active low signal used by the power supply to indicate to the system that a change in power supply status has occurred. this event can be triggered by faults such as ovp, ocp, otp, and fan fault. this signal can be cleared by a clear_fault command. recommended pull-up resistor to 12 vsb is 8.2 k with a 3.0 k pull-down to ground. a 100 pf decoupling capacitor is also recommended. min max v il input logic level low 0.8 v v ih input logic level high 2.0 v 5.0 v i source current that may be sourced by this pin 4 ma i sink current that may be sunk by this pin at low state 4 ma bus signals ishare bus signal used by the power supply for active current sharing. all power supplies confgured in the system for n+n sharing will refer to this bus voltage inorder to load share. voltage range the range of this signal for active sharing will be up to 8.0 v, which corresponds to the maximum output current. min max i share voltage vshare at 100% load, stand-alone unit 7.75 8.25 voltage at 50% load, stand-alone unit 3.85 4.15 voltage at 0% load, stand-alone unit 0 0.3 i source current that may be sourced by this pin 160 ma scl, sda clock and data signals defned as per i 2 c requirements. it is recommended that these pins be pulled-up to a 2.2 kohm resistor to 3.3 v and a 100 pf decoupling capacitor at the system side. vl input logic level low 0.8 v vh input logic level high 2.0 v 5.0 v note: all signal noise levels are below 400 mvpk-pk from 0 - 100 mhz. i 2 c addressing table: not applicable. this power supply has a fixed i 2 c address. in order to support multiple addresses, the system will have to utilize a switcher or an i 2 c expander. ds1100ped data sheet
electrical specifcations led indicators a single bi-color led is used to indicate the power supply status. status led no ac input to psu off when stand-alone, blinking amber when in parallel main output on solid green standby mode or power supply failure (ocp, ovp, otp, fan fault) blinking amber firmware reporting and monitoring accuracy range output loading 5 to 20% 20 to 50% 50 to 100% input voltage 5% input current 0.55 a fxed error 4% input power 1.25 w at < 125 w input 1.25% output voltage 2% output current 0.3 a fxed error 2% temperature 5 c on the operating range e in 15% from 10% to 20% load 5% fan speed actual rpm 250 rpm pmbus yes remote on/off yes over-current limit trimming yes ds1100ped data sheet
electrical specifcations timing specifcations description min max unit t sb_on delay from ac being applied to standby output being within regulation 20 1700 ms t sb_acok delay from standby output to acok assertion see note below 20 ms t sb_vout delay from standby output to main output voltage being within regulation 300 ms t ac_on_delay delay from ac being applied to main output being within regulation 2000 ms t pwr_good_on delay from output voltages within regulation limits to pwok asserted 100 1000 ms t acok_delay delay from loss of ac to assertion of acok 6 ms t pwr_good_hold-up delay from loss of ac to deassertion of pwok 10 ms t vout_hold-up delay from loss of ac to main output being within regulation 11 ms t sb_hold-up delay from loss of ac to standby output being within regulation 150 ms t pwr_good_off delay from deassertion of pwok to output falling out of regulation 1 ms t pson_on_delay delay from pson assertion to output being within regulation 350 ms t pwok_low duration of pwok being in deasserted state during an on/off cycle of psu n/a n/a note: t vout_hold-up : tested at 1a load on standby output t sb_acok : acok can assert earlier than the standby output timing diagram pson vout_main pwok acok vout_stby ac input t sb_on t ac_on_delay t sb_vout t pson_on_delay t sb_hold-up t pwok_hold-up t vout_hold-up t pwok_o? t acok_delay t pwok_on t sb_acok ds1100ped data sheet
mechanical outline a a a 196,50.5 20 90.5 86,30.5 9,30.3 17,8 150.3 190,90.5 1,5 std (forward) airflow 61,9 0,6 40,2 38,50.5 40.2 9,5 model label iec c16 ac inlet ds1100ped data sheet
ds1100ped 28may2015 connector defnitions output connector part number card-edge mating connector part number fci 10107844-002lf or equivalent p21 - 28 p29 - p36 p19 / 2 0 . . . s24 s 1 3 power supply output card edge (bottom side) p1 - p 8 ? p 9 - p18 . . s1 s12 power supply output card edge (top side) output connector pin confguration s1 ps present s13 ps_on s2 reserved s14 ps_kill s3 reserved s15 reserved s4 pwr_good s16 rtn s5 acok (ac input present) s17 sda s6 rtn s18 rtn s7 i-share s19 scl s8 reserve s20 rtn s9 ps interrupt_l s21 remote sense- s10 rtn s22 rtn s11 reserved s23 remote sense+ s12 reserved s24 reserve p1-p8 vo p19-p20 vsb p9-p18 rtn p21-p28 rtn p29-p36 vo environmental specifcations operating temperature 0 to 50 c, refer to power derating curve for operation up to 65 c operating altitude up to 10,000 feet operating relative humidity 20% to 80% non-condensing non-operating temperature -40 to +70 c non-operating relative humidity 10% to 95% non-condensing non-operating altitude up to 50,000 feet vibration and shock standard operating/non-operating shock/vibration rohs compliance yes mtbf 200,000 hours per telcordia issue 2, method 1, case 3 at 25 c ambient at full load operating life minimum of 5 years reliability all electronic component derating analysis is done at maximum ambient, 80% of maximum rated load, nominal input line voltage. ds1100ped data sheet for more information: www.artesyn.com/power for support: productsupport.ep@artesyn.com www.artesyn.com worldwide offices americas 2900 s.diablo way tempe, az 85282 usa +1 888 412 7832 europe (uk) waterfront business park merry hill, dudley west midlands, dy5 1lx united kingdom +44 (0) 1384 842 211 asia (hk) 14/f, lu plaza 2 wing yip street kwun tong, kowloon hong kong +852 2176 3333 while every precaution has been taken to ensure accuracy and completeness in this literature, artesyn embedded technologies assumes no responsibility, and disclaims all liability for damages resulting from use of this information or for any errors or omissions. artesyn embedded technologies, artesyn and the artesyn embedded technologies logo are trademarks and service marks of artesyn embedded technologies, inc. all other names and logos referred to are trade names, trademarks, or registered trademarks of their respective owners. ? 2015 artesyn embedded technologies, inc.
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